Computer execution instruction process diagram

Computer execution instruction process diagram?

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Detailed description and reprinting of computer instruction execution process

20 18- 10-26 22:22: 13

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Let nature take its course ~

Code age 13 years

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First, the basic composition of the computer

Characteristics of Von Neumann Computer (Arithmetic Unit-centered Machine)

1. A computer consists of five parts: a controller (analyzing and executing machine instructions and controlling all components to work together), an arithmetic unit (performing arithmetic and logical operations on data according to control signals), a memory (storing intermediate results in an internal memory and information to be stored for a long time in an external memory), an input device (receiving external information) and an output device (transmitting information to the outside world).

2. There is no difference between instructions (programs) and data stored in memory in binary.

3. The program runs automatically

Modern computers consist of three parts (which have been transformed into memory-centric).

1.CPU (central processing unit) Central processing unit, the core components are ALU (arithmetic logic unit) and CU (control unit).

2. Input and output devices (controlled by control unit)

3. Main memory (MM) is divided into RAM (Random Access Memory) and ROM (Read Only Memory).

//CPU and MM form a host, and I/O devices can be called external devices.

Second, the execution process of an instruction in the CPU.

//technical terms

1 address. Advertisement (address)

2. Data register

3. Address register

4. Instruction register

5. Buffer register

5. Instruction decoder

6. Program counter

Process description:

The CPU of almost all von Neumann computers can be divided into five stages:

Accept guidance

decode

execution instruction

Access number

Write back the result

1. instruction fetch stage

The instruction fetch (IF) stage is the process of fetching an instruction from main memory to the instruction register.

The value in the program counter PC is used to indicate the position of the current instruction in the main memory. When the instruction is fetched, the value in the PC will automatically increase according to the instruction word length: (PC)+ 1 PC If it is a single-word instruction; If it is a double-word instruction, (PC)+2 PC, and so on.

//PC-& gt； AR-& gt； memory

//Memory-> Infrared Radiation (infrared radiation)

2. Instruction decoding stage

After the instruction is fetched, the computer immediately enters the instruction decoding (ID) stage.

In the instruction decoding stage, the instruction decoder splits and interprets the retrieved instructions according to the predetermined instruction format, and identifies different instruction categories and various methods to obtain operands.

In the computer controlled by combinational logic, the instruction decoder generates different control potentials for different instruction operation codes, forming different micro-operation sequences; In a microprogrammed computer, the instruction decoder uses the instruction operation code to find the entry of the microprogram to execute the instruction, and starts execution from this entry.

// {1. A.D.

//Memory-> IR-& gt； ID-& gt； {2.PC changes

// {3. Control unit

3. Access number stage

According to the needs of instructions, you can access main memory and read operands, thus entering the memory (MEM) stage.

The task of this stage is to obtain the address of the operand in the main memory according to the instruction address code, and read the operand from the main memory for operation.

//Ad-& gt； AR-& gt； AD-& gt； memory

4. Execution instruction stage

After the instruction fetch and instruction decode stages, it enters the execution (EX) stage.

The task of this stage is to complete various operations specified in the instruction and realize the function of the instruction. To do this, different parts of the CPU are connected to perform the required operations.

For example, if an addition operation is required, the arithmetic logic unit ALU will be connected to a set of inputs and a set of outputs. The inputs provide the values to be added, and the outputs contain the final operation results.

//Memory-> DR-& gt； potato

5. Write-back stage of results

As the last stage, the write-back (WB) stage "writes back" the operation result data in the instruction execution stage to some storage form: the result data is often written into the internal register of CPU for quick access by subsequent instructions; In some cases, the result data can also be written into the main memory, which is relatively slow, but cheaper and has a larger capacity. Many instructions will also change the status of flag bits in the program status word register, which identify different operation results and can be used to influence the action of the program.

//DR-& gt； memory

6. Cycle stage

After the instruction is executed, the result data is written back, if there are no unexpected events (such as result overflow). ), the computer will get the address of the next instruction from the program counter PC and start a new cycle, and the next instruction cycle will fetch the next instruction in sequence.

//Repeat 1~5

//Stop at hlt(holt on)

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