What is the specific purpose of digital microwave modem?

Author: He Peng Mei Shunliang, Tsinghua University State Key Laboratory of Digital Microwave Abstract: This paper introduces the structure, functions and technical features of all-digital modem STEL-2 176, and gives its application example in point-to-multipoint broadband wireless access system. In this system, STEL-2 176 is used as the modem of the subscriber station, and the digital demodulation of 16QAM signal and the digital modulation of QPSK signal are realized by asymmetric transmission. Key words: broadband wireless access Full digital modem Asymmetric transmission 1 Asymmetric transmission Broadband wireless access system usually adopts point-to-multipoint base station/subscriber station mode. In most cases, the downlink data from the base station to the subscriber station is much larger than the uplink data from the subscriber station to the base station. If the uplink and downlink occupy the same resources, it is bound to cause waste. In TDMA/FDD mode, the feasible transmission modes are: the uplink data is in the form of burst packets, and the modulation mode with relatively low modulation efficiency (such as QPSK); Downlink data broadcasting adopts a modulation mode with relatively high modulation efficiency (such as 16QAM). The advantages of this asymmetric transmission are: on the one hand, it can dynamically allocate bandwidth according to the actual needs of users and improve the efficiency of spectrum utilization; On the other hand, the number of bits per symbol of the uplink signal is reduced, thus reducing the difficulty of the burst demodulation algorithm of the base station. A subscriber station modem that can meet the above requirements must have the ability to demodulate both broadband continuous signals with high modulation efficiency (such as 16QAM) and broadband burst signals with relatively low modulation efficiency (such as QPSK). It is a good choice to develop STEL-2 176. 2 stel-2176 stel-2176 is an all-digital modem chip, which is compatible with IEEE802. 14, MCNS and DAVIC standards. The demodulation part can directly input intermediate frequency analog signals up to 50MHz, and the signal bandwidth can reach 8MHz, which can demodulate continuous signals of 16/64/256 QAM. The modulation section can output continuous/burst signals from 5 MHz to 65 MHz. The modulation mode can be BPSK/QPSK/ 16QAM, and the highest rate can reach 40Mbps( 16QAM). 3 STEL-2 176 Internal Structure 3. 1 Demodulation Part Diagram 1 is the internal structure of STEL-2 176 Demodulation Part, which is mainly composed of ADC (Analog-to-Digital Conversion) module, DDC (Digital Downconversion) //AFC (Automatic Frequency Control)// The analog-to-digital conversion module of ADC module receives the IF analog signal of STEL-2 176 with the center frequency as high as 50MHz, and obtains the sub-IF digital signal with the center frequency of 6 MHz ~ 7 MHz through bandpass sampling. DDC/AFC/AGC module AFC roughly estimates the signal carrier, and then fine-tunes the carrier local oscillation frequency through the carrier error signal fed back by the back-end adaptive equalizer to obtain the relevant carrier. DDC receives 6 MHz ~ 7 MHz sub-intermediate frequency digital signals, and demodulates I and Q baseband signals through related carriers. At the same time, AGC control signals are output to control the signal strength of off-chip IF and RF analog signals. Filter and clock recovery module I and Q baseband signals pass through SRRC (root mean square raised cosine) filter with alpha = 0. 12 ~ 0.20 to eliminate intersymbol interference, and then the symbol rate is recovered from the signal, and the error is less than 100PPM. Adaptive equalization Adaptive equalization can not only eliminate all kinds of interference in the channel (multipath effect, amplitude modulation interference, frequency modulation interference, phase noise, etc.). ), but also feedback the carrier error signal to fine-tune the carrier phase difference and small frequency difference. FEC module The forward error correction coding module receives the demodulated I and Q signals, maps constellation points, recovers data, decodes the frame structure corresponding to the modulation end, performs deinterleaving, channel decoding (rs code) and descrambling in turn, and outputs the original signals in a serial or parallel way, which can output signals with MPEG-2 structure. Clock module The clock module generates various clock signals required by the demodulation part from the sampling clock and the recovered symbol clock. 3.2 modulation part figure 2 shows the internal structure of stel-2 176 modulation part, which mainly consists of data receiving and channel coding module, constellation point mapping module, FIR filter and interpolation filter, modulation module, DAC (digital-to-analog conversion) module and clock module. The data receiving and channel coding module receives the serial input raw data and performs channel coding (RS code), including interleaving and scrambling. These processes are optional. The constellation point mapping module maps the serial bit stream to the constellation point of the specified constellation diagram and outputs it in I and Q channels. FIR filter and interpolation filter I and Q signals are filtered by shaping filter (32-stage FIR filter) and output to interpolation filter. The interpolation filter greatly increases the sampling frequency of the signal to meet the requirement that the carrier signal is more than 2 times, and matches the required rate of orthogonal modulation. Modulation Module The modulation module is an orthogonal modulator composed of DDS (Direct Digital Frequency Synthesizer) and multiplier. I and Q signals are respectively multiplied by SIN and COS carrier signals generated by DDS, and then synthesized and output. The digital-to-analog conversion module finally converts the digital signal into an intermediate frequency analog modulation signal and outputs it. At this time, the signal has a mirror image signal relative to the main clock frequency, that is, the output analog signal needs off-chip filtering. The clock module is synchronized with the external clock to generate various clock signals required by the modulation part. 3.3 The monitoring part receives external configuration commands in serial or parallel through the monitoring module of STEL _ 2 176, and sends status information. The monitoring of STEL _ 2 176 is realized by accessing its internal registers. 4 STEL-2 176 Technical Features STEL-2 176 adopts all-digital modem technology. Compared with traditional modems, STEL-2176 has advantages in system stability, reliability and flexibility in transmission rate, carrier rate and modulation mode. 4. 1 high integration and low power chip technology STEL-2 176 adopts CMOS chip technology with a line width of 0.35 micron, which has high integration and improves the stability and reliability of the system; The working voltage is +3.3v, which greatly reduces the power consumption of the chip. The interface can flexibly provide optional I/O voltage (+5v/+3.3v). 4.2 Broadband ADC/DAC This is the symbolic technology of all-digital modulation and demodulation technology, which converts analog signals into digital signals as much as possible at the front end of the signal channel to give full play to the role of digital signal processing technology. STEL-2 176 adopts 10bit ADC and DAC, which can process analog signals with a bandwidth close to 10 MHz. Because of the band-pass sampling technology, the center frequency of analog signal can reach tens of megahertz. 4.3 All-digital modems adopting DDS technology and multi-rate signal processing algorithm generally adopt DDS technology and multi-rate signal processing algorithm, so that the system can obtain almost continuous clock signals of various frequencies under a single reference clock. Because the reference sources are the same, these clocks are frequency dependent. Using these clock signals, different carrier frequencies, bit rates and control signals can be obtained. In addition, when processing transmission signals in digital baseband, multi-rate signal processing algorithms such as decimation and interpolation are used to achieve signal rate matching between different digital processors. This can realize multi-rate transmission signal and multi-mode modulation signal. This flexibility is fully reflected in the application of STEL-2 176. 4.4 Digital demodulation algorithm For the receiving part of a communication system, the most important thing is synchronization, so it is necessary to recover the carrier and timing. The core of digital demodulation algorithm is the recovery of carrier and timing, which is also the key problem in the design of all-digital modem. STEL-2 176 firstly recovers the timing, and then uses a complete feedback structure to recover the carrier based on the timing: firstly, NDA (non-data-aided) algorithm is used to roughly estimate the large frequency difference, and the estimated error is fed into AFC (automatic frequency control) to make the local oscillator track the large frequency difference, and then DD (data-oriented) algorithm is used to estimate the phase difference and small frequency difference, which are fed into PLL (phase locked loop) control. The characteristic of STEL-2 176 digital demodulation algorithm is that it does not need the known information symbol-preamble, but it takes a long time to restore synchronization, so it can only be used in continuous demodulator. Example of application in broadband wireless access system Figure 3 shows the principle block diagram of a subscriber station modem in a point-to-multipoint broadband wireless access system. The microprocessor AT89C5 1 completes the monitoring and configuration of the system, including the configuration of working parameters of STEL-2 176 and the loading of initial parameters of FPGA. FPGA completes the interaction with MAC layer. The receiver STEL-2 176 is set to input an intermediate frequency analog signal of 44MHz, the information rate is 9.92MHz, and the demodulation mode is 16QAM. IF signal is input into STEL-2 176 after passing through bandpass filter and AGC, and the data and demodulation clock output from STEL-2 176 are input into FPGA for baseband processing. The transmitter STEL-2 176 is set to output an intermediate frequency analog signal of 44MHz, the information rate is 5. 12MHz, and the modulation mode is burst QPSK. The FPGA performs baseband processing, generates burst data packets, and outputs them to STEL-2 176 to control the output signals of STEL-2 176. IF analog signals are filtered and amplified and then output to ODU (outdoor unit) equipment. In addition, STEL- 1 109, as the downlink modulator of the base station, completes the continuous modulation of 16QAM. STEL-9257, as the uplink demodulator of the base station, completes the burst demodulation of QPSK and forms a complete point-to-multipoint broadband wireless access system with asymmetric transmission. Practice has proved that the system scheme is feasible. The system adopts a series of devices such as STEL-2 176 and FPGA, which greatly simplifies the system hardware and improves the reliability and stability of the system. In addition, because STEL-2 176 has high spectrum utilization efficiency and flexible configuration, it is very convenient and effective to use STEL-2 176 as the modem of the subscriber station in the point-to-multipoint broadband wireless access system.